VLSI Architecture Design, Hardware AI Accelerator Designs, Hardware aware Neural Network architecture (search) design, Approximate computing VLSI design, FPGA based CNN and AI designs, FPGA Architecture Design, Neuromorphic Computing, Assistive biomedical devices, Rehabilitation Robotics
Recent Publications
(more detailed publication list is available in the lab webpage.)
- Ajay B S, Phani Pavan K, and Madhav Rao, MC-QDSNN: Quantized Deep evolutionary SNN with Multi-Dendritic Compartment Neurons for Stress Detection using Physiological Signals, IEEE Transactions of Computer-Aided Design of Integrated Circuits and Systems, November 2024.
- D. R. Vasanthi, S. Gopala Krishna Reddy and M. Rao, "HRM: M-Term Heterogeneous Hybrid Blend Recursive Multiplier for GF(2n) Polynomial," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 32, no. 8, pp. 1447-1460, Aug. 2024.
- B. G. Gowda, H. C. Prashanth, V. N. Muralidhara and M. Rao, “A probabilistic approach to design inexact compressors for approximate booth multipliers.”, Analog Integrated Circuits & Signal Processing Journal, Springer Nature Publisher, February 2025
- Prashanth H C, and Madhav Rao, Accelerated and Highly Correlated ASIC Synthesis of AI Hardware Subsystems Using CGP, IET Computers & Digital Techniques, vol. 2024, Article ID 6623637, 23 pages, 2024.
- Gopika Gopan K, S.V.R. Aditya Reddy, Madhav Rao, Neelam Sinha, Analysis of single channel electroencephalographic signals for visual creativity: A pilot study, Biomedical Signal Processing and Control, Volume 75, pp 103542, 2022.
- Vinay C K, Krishna N, Arvinda H, Vikas Vazhayil, and M. Rao, Design of a Device for Lower Limb Prophylaxis and Exercise, IEEE Journal of Translational Engineering in Health & Medicine, vol. 9, pp. 1-7, 2021, Art no. 2100107, doi: 10.1109/JTEHM.2020.3037018.
- P. Deepika, K. V. V. Deepesh, P. S. Vadali, Madhav Rao, V. Vazhayil and A. M. Uppar, Computer Assisted Objective Assessment of Micro-Neurosurgical Skills from Intraoperative Videos, in IEEE Open Journal of Engineering in Medicine and Biology, vol. 4, pp. 11-20, 2023.
- Prashanth H C, Madhav Rao, Dhanya E, V Ramasubramanian, Trainable windows for SincNet architecture, in EURASIP Journal on Audio, Speech, and Music Processing, Issue 1, Pages 3, 2023.
- Yashwant Moses and Madhav Rao, A Fixed-Point Pre-Processing Hardware Architecture Design for Complex Independent Component Analysis, 2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC), Incheon, Korea, Republic of, 2024, pp. 244-249.
- Lakshmi Sai Niharika Vulchi, Pranathi Valipireddy, Mahati Basavaraju, and Madhav Rao, HyPPO: Hybrid Piece-wise Polynomial Approximation and Optimization for Hardware Efficient Designs, 30th Asia and South Pacific Design Automation Conference (ASPDAC 2025) Tokyo, Japan, January 20-23, 2025.
- Sarthak Harne, Monjoy Narayan Choudhury, Madhav Rao, T K Srikanth, Seema Mehrotra, Apoorva Vashisht, Aarushi Basu, and Manjit Singh Sodhi, CASE: Efficient Curricular Data Pre-training for Building Assistive Psychology Expert Models, In Findings of the Association for Computational Linguistics: EMNLP 2024, pages 15769–15778, Miami, Florida, USA. Association for Computational Linguistics.
- Nitheezkant R, Prashanth Jonna, and Madhav Rao MagNeura: DNN Factored Magnetic Sensor Based Finger Tracking Wearable Design, 2024 IEEE Biomedical Circuits and Systems Conference, Xi’an, China, October 24-26, 2024.
- S. Gurjar, A. B K, V. Bharadiya, B. G. Gowda and M. Rao, "Meta-Heuristic Optimization of CNNs with Approximate Error Distributed Multipliers," 2024 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Knoxville, TN, USA, 2024, Best Poster Award
- D. N. Devi, and M. Rao, "Precision-Factored Systolic Arrays: Balancing Accuracy and Efficiency in Floating-Point Computations for CNNs," 2025 IEEE International Symposium on Circuits & Systems (ISCAS), London, UK, 2025 (Accepted).
- Dantu Nandini Devi, Ajay Kumar Gandi, Bindu G. Gowda and M. Rao, OEDASA: Optimization Enabled Error-Diluted Approximate Systolic Array Design for an Image Processing Application, 2024 37th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID), Kolkata, India, 2024, (Best paper nominee in the 2024 VLSI Design Conference)
- G. R. K. Reddy, S. G. K. Reddy, V. D R and M. Rao, "MNHOKA - PPA Efficient M-Term Non-Homogeneous Hybrid Overlap-free Karatsuba Multiplier for GF (2n) Polynomial Multiplier," 2023 IEEE 41st International Conference on Computer Design (ICCD), Washington, DC, USA, 2023.
- Achintya Harsha, Nitheezkant R, Barath Narayan, Anshul Madurwar, Aamod B K, Prashanth Jonna, M. Rao, “Design and Development of 8-DoF Forearm Rehabilitation Device”, 2024 46th Annual International Conference of the IEEE Engineering in Medicine & Biology Society (EMBC), Florida, USA, 2024.
Design and analysis of VLSI Subsystem (NPTEL since Jan 2022),
VLSI Architecture Design (IIITB)
Digital CMOS VLSI Design (IIITB),
Analog Circuits Lab (IIITB),
Electronic Circuits Lab (IIITB),
Autonomous Robotics (at Samsung),
Electronic devices and Circuit Theory & Lab (IIITB)
Design of a Hardware Accelerated Implementation of AI/ML designed OFDM/64QAM for Real Time Video Compression, sponsored by Sony India Software Center (SISC) [December 2023 to January 2025].
AI based Placement and Routing for Chip design, sponsored by Micron Technology, [October 2023 to April 2025].
Chip Design Studio, sponsored by Samsung Semiconductor India Research, [2024-25].
Design of a AI-Robotic System for human body rehabilitation, sponsored by Sony Sensing Solutions University Program (SSUP), [2022-2025].
Decoding Speech Imagery for subjects with Post-Stroke Aphasia using Consumer Grade EEG Devices (in-collaboration with NIMHANS), Sponsored by ICMR, [2024 to 2027].
Attack-Resilient Connected IoT System for Sustainable Agriculture (ARISA), sponsored by TIH-IOT (IIT-Bombay), [2023 to 2025]
ASD screening device, sponsored by IBM GUP [2021-22].
Mental health distress levels identification, sponsored by IBM GUP [2022-23].
Center of Internet of Ethical Things by GoK [2022-27]
AI assisted anthropomimetic upper limb device, sponsored by IBM SUR [2018-20].
Development of anthropomimetic upper limb device, sponsored by MSJE [2018-2021].
Single Touch automated Citizen Safety Emergency Response and Evidence Capture System, sponsored by [MEITY 2017-2020]
Development of electric current driven nanomagnetic logic device, sponsored by SERB [2014-2017]
INTEL sponsored Galileo board curriculum design [2014]
INTEL sponsored FICE workshop for high school students [2017]
ESDM Research Center [2013-14]
